NXP Semiconductors /LPC43xx /SCT /EVEN

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as EVEN

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (IEN0)IEN0 0 (IEN1)IEN1 0 (IEN2)IEN2 0 (IEN3)IEN3 0 (IEN4)IEN4 0 (IEN5)IEN5 0 (IEN6)IEN6 0 (IEN7)IEN7 0 (IEN8)IEN8 0 (IEN9)IEN9 0 (IEN10)IEN10 0 (IEN11)IEN11 0 (IEN12)IEN12 0 (IEN13)IEN13 0 (IEN14)IEN14 0 (IEN15)IEN15 0RESERVED

Description

SCT event enable register

Fields

IEN0

The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15).

IEN1

The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15).

IEN2

The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15).

IEN3

The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15).

IEN4

The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15).

IEN5

The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15).

IEN6

The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15).

IEN7

The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15).

IEN8

The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15).

IEN9

The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15).

IEN10

The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15).

IEN11

The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15).

IEN12

The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15).

IEN13

The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15).

IEN14

The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15).

IEN15

The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15).

RESERVED

Reserved

Links

()